The present invention relates to a process and apparatus for the deposition of dielectric layers during semiconductor substrate processing. More specifically, the present invention relates to a method for depositing and integrating layers of fluorosilicate glass and silicon nitride in a high-density plasma chemical vapor deposition reactor.
Semiconductor device geometries continue to decrease in size, providing more devices per fabricated wafer and faster devices. Since the introduction of semiconductor integrated circuits several decades ago, integrated circuits have generally followed a trend of more transistors in less space with each new generation of devices. Currently, some devices are being fabricated with less than 0.25 xcexcm spacing between features. In some cases there is as little as 0.18 xcexcm spacing between device features. Examples of these features are conductive lines or traces pattered on a layer of metal. Aluminum has been typically used in such traces. Recently, techniques have been developed for depositing traces made of copper. Copper is desirable in such traces as it is a more electrically conductive material than aluminum.
A nonconductive layer of dielectric material, such as a silicon oxide, is often deposited between and over the patterned metal layer. This dielectric layer may serve several purposes, including electrically insulating the metal layer from other metal layers, insulating conductive features within the layer from each other and protecting the metal layer and/or features from physical or chemical damage. As the spacing, or gap, between the conductive features becomes smaller, the capacitance of the resulting devices becomes larger. Increased capacitance can slow down the operation of an integrated circuit. One way to reduce the capacitance is to use an insulating material with a low dielectric constant. Such materials are often referred to as low k dielectrics.
One approach to depositing low dielectrics to fill gaps is to incorporate halogen atoms into a silicon dioxide layer. Examples of Halogen incorporation are described in U.S. patent application Ser. No. 08/548,391, filed Oct. 25, 1995 and entitled xe2x80x9cMETHOD AND APPARATUS FOR IMPROVING FILM STABILITY OF HALOGEN-DOPED SILICON OXIDE FILMSxe2x80x9d, and Ser. No. 08/538,696, filed Oct. 2, 1995 and entitled xe2x80x9cUSE OF SiF4 TO DEPOSIT F-DOPED FILMS OF GREATER STABILITYxe2x80x9d, both of which are incorporated herein by reference. It is believed that halogen dopants, such as fluorine, lower the dielectric constant of the silicon oxide films because halogens are electronegative atoms that decrease the polarizability of the overall SiOF network. Fluorine doped silicon oxide films are often referred to as fluorinated silicate glass (FSG) films.
The fluorine content generally determines the properties of a layer of FSG such as the dielectric constant. The fluorine content of the FSG is measured with Fourier Transform Infrared Spectroscopy (FTIR) in terms of the ratio the heights of two absorption peaks. The height of a first (SiF) peak generally indicates the presence of Sixe2x80x94F bonds. The height of a second (SiO) peak generally indicates the presence of Sixe2x80x94O bonds. The average fluorine concentration in the FSG is measured by percentage peak height ratio (% PHR) as follows:       %    ⁢          xe2x80x83        ⁢    PHR    =            SiF      SiO        xc3x97    100    ⁢    %  
Direct measurement of the fluorine content of the FSG has shown that the % PHR is roughly proportional to the atomic % fluorine (at. % F) in the FSG layer. The at. % F is sometimes approximated by the formula:
at. % F=(% PHR)xc3x97K,
where K is an empirically determined constant. The fluorine concentration (at. % F) can be determined by such methods as secondary ion mass spectroscopy (SIMS), attenuated total reflection (ATR), or elemental analysis.
One way to deposit a dielectric layer is by chemical reaction of gases. Such a deposition process is referred to as chemical vapor deposition (CVD). Thermal CVD processes supply reactive gases to the substrate surface where heat-induced chemical reactions take place to produce a desired film. The high temperatures at which some thermal CVD processes operate can damage metal layers on device structures. Plasma enhanced CVD (PECVD) processes, on the other hand, promote excitation and/or dissociation of the reactant gases by capacitively coupling radio frequency (RF) energy to a reaction zone proximate the substrate surface, thereby creating a plasma of highly reactive species. The high reactivity of the released species reduces the energy required for a chemical reaction to take place and thus lowers the required temperature for such CVD processes. Unfortunately some PECVD processes cause variations in deposition rates according the geometry of the underlying feature. Such phenomena can create voids in the bottoms of the gaps.
Improved gap filling can be obtained with high-density plasma CVD (HDP-CVD) systems. In HDP-CVD, RF coils generate an inductively coupled plasma under low-pressure conditions. The density of such a plasma is greater by approximately two or more orders of magnitude than the density of a capacitively coupled PECVD plasma. It is believed that the lower chamber pressure employed in HDP-CVD systems provides active species with a long mean free path. The long mean free path combined with the high density allows a significant number of plasma constituents to reach even the deepest portions of closely spaced gaps, providing a film with excellent gap filling capabilities. The high density associated with HDP-CVD also promotes sputtering during deposition. The sputtering is believed to slow the deposition at the top of the gap and thus keep the gap from closing prematurely.
Unfortunately there are some problems associated with FSG layers separating copper conductive traces. One problem is that copper is highly diffusive in dielectric materials such as FSG. Furthermore, a poorly formed FSG layer may absorb moisture from the atmosphere or from reaction products associated with the deposition process. Copper diffusion and moisture absorption can be prevented by depositing a thin layer of silicon nitride (Si3N4) on top of an FSG or between the FSG layer and the copper layer. The silicon nitride acts as a diffusion barrier. Copper has a diffusion length in silicon nitride of between approximately 150 and 200 angstroms. Thus a Si3N4 layer 200 angstrom thickness or greater is sufficient to prevent diffusion of copper into a dielectric layer underlying, or overlying, the Si3N4. Unfortunately, fluorine tends to outgas from the FSG at temperatures of about 350 C. The outgassing fluorine forms xe2x80x9cbubblesxe2x80x9d in an overlying Si3N4 layer. The bubbles may then lead to delamination of the Si3N4.
One typical sequence for depositing thin films using HDP-CVD has been to flow argon into the chamber, then strike an argon plasma at a pressure of approximately 40 millitorr. Once the plasma is struck, the pressure in the chamber is reduced to about 5 millitorr (for example, by opening a throttle valve) and then deposition gases are introduced to the chamber to deposit the film. Unfortunately, for the first few seconds of deposition by this method, the deposition gases do not flow evenly since each gas nozzle may be at a different pressure. Deposition starts immediately if the plasma is already on when deposition gases start to flow. Thus, the initial burst of gases with the plasma already on causes a non-uniform initial layer a few hundred angstroms in thickness. Non-uniformity of the film is usually determined by measuring the thickness of the film at a number of (e.g., 49) equidistant points and taking the width of the resulting thickness distribution at half of maximum. A thin film deposited as set forth above typically exhibits, within about 10 seconds of striking the plasma, a non-uniformity of about 4.75%. The non-uniformity might decrease to about 3.5% after about 30 seconds and slowly increase to about 4% after about 60 seconds.
This is not generally a problem with thick films (i.e., greater than about 1000 xc3x85) since thickness of the initial non-uniform layer is usually a small percentage of the total film thickness. For example, suppose a 10,000-xc3x85 thick film has a 300 xc3x85 thick non-uniform initial layer. The non-uniform initial layer constitutes only 3 percent of the total film thickness. However, for a film less than 1000 xc3x85 in thickness, the same 300 xc3x85 non-uniform layer comprises 30 percent or more of the thickness of the entire film. Such non-uniformity is often undesirable in a cap layer.
Therefore a need exists in the art for a stable low dielectric constant FSG film with a silicon nitride cap layer that strongly adheres at high temperatures and a concomitant method of depositing same.
The method of the present invention overcomes the disadvantages of the prior art by depositing a silicon oxide layer (e.g., FSG) on a substrate; and treating the dielectric layer with oxygen prior to forming a silicon nitride cap over the layer. The oxygen treatment stabilizes the FSG. In one embodiment of the invention a layer of FSG having a fluorine content of greater than about 7%, as measured by peak height ratio, is deposited by HDP CVD, and treated with an oxygen plasma. A thin ( less than 1000 xc3x85 thick) layer of silicon nitride is deposited on a layer of FSG using a low-pressure strike as described more fully below.
The first dielectric may be deposited by flowing a silicon containing, fluorine containing and oxygen containing gases a deposition chamber, generating a first plasma and depositing the first dielectric layer with the first plasma. The second dielectric layer may be deposited by flowing one or more process gases to a deposition chamber, performing a low pressure strike to initiate a plasma depositing the second dielectric layer with second plasma. The low pressure strike can be achieved by establishing flows of the process gases such that the pressure in the chamber is between 5 and 100 millitorr, turning on a bias voltage for a period of time sufficient to establish a weak plasma. The weak plasma may be capacitively coupled. After the weak plasma is established a source voltage is turned on and subsequently the bias voltage is turned off.
Alternatively, a low dielectric constant film may be formed by depositing a fluorosilicate glass (FSG) with a first atomic ratio of fluorine to oxygen, treating the FSG to reduce the ratio of fluorine to oxygen, and subsequently depositing silicon nitride on top of said FSG layer. Preferably, the FSG deposition, oxygen treatment, and silicon nitride deposition are all performed in the same chamber without removing the substrate from the chamber.
In an alternative embodiment, the low dielectric constant film is formed with a layer of FSG between two layers of silicon nitride. Each silicon nitride layer is formed using a low-pressure strike and the FSG layer is treated with oxygen to enhance stability of the film.
The various versions of the present invention may be embodied as a program code for controlling a semiconductor wafer processing system. The program code may be stored in a suitable computer readable storage medium. The program code can be configured to control a deposition apparatus comprising: a deposition chamber, a gas panel coupled to the chamber, a plasma generating system coupled to the chamber, and a controller coupled to the gas panel, the source power supply and the bias power supply. The controller typically contains the computer readable storage medium having the program code.
Films deposited according to the various embodiments of the present invention exhibit low dielectric constant, good thermal stability, and strong adhesion. Furthermore, process integration can be enhanced by depositing both films by HDP-CVD in situ. The embodiments of the method are particularly useful in copper damascene applications.